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high speed, low noise video op amp ad829 rev. h information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2009 analog devices, inc. all rights reserved. features high speed 120 mhz bandwidth, gain = ?1 230 v/s slew rate 90 ns settling time to 0.1% ideal for video applications 0.02% differential gain 0.04 differential phase low noise 1.7 nv/hz input voltage noise 1.5 pa/hz input current noise excellent dc precision 1 mv maximum input offset voltage (over temperature) 0.3 v/c input offset drift flexible operation specified for 5 v to 15 v operation 3 v output swing into a 150 load external compensation for gains 1 to 20 5 ma supply current available in tape and reel in accordance with eia-481a standard general description the ad829 is a low noise (1.7 nv/hz), high speed op amp with custom compensation that provides the user with gains of 1 to 20 while maintaining a bandwidth >50 mhz. its 0.04 differential phase and 0.02% differential gain performance at 3.58 mhz and 4.43 mhz, driving reverse-terminated 50 or 75 cables, makes it ideally suited for professional video applications. the ad829 achieves its 230 v/s uncompensated slew rate and 750 mhz gain bandwidth while requiring only 5 ma of current from power supplies. the external compensation pin of the ad829 gives it exceptional versatility. for example, compensation can be selected to optimize the bandwidth for a given load and power supply voltage. as a gain-of-2 line driver, the ?3 db bandwidth can be increased to 95 mhz at the expense of 1 db of peaking. its output can also be clamped at its external compensation pin. the ad829 exhibits excellent dc performance. it offers a minimum open-loop gain of 30 v/mv into loads as low as 500 , a low input voltage noise of 1.7 nv/hz, and a low input offset voltage of 1 mv maximum. common-mode rejection and power supply rejection ratios are both 120 db. this op amp is also useful in multichannel, high speed data conversion where its fast (90 ns to 0.1%) settling time is important. in such applications, the ad829 serves as an input buffer for 8-bit to 10-bit adcs and as an output i/v converter for high speed dacs. connection diagram ad829 top view (not to scale) offset null 1 ?in 2 +in 3 ?v s 4 offset null +v s output c comp 8 7 6 5 00880-001 figure 1. 8-lead pdip (n), cerdip (q), and soic (r) 00880-002 20 19123 18 14 15 16 17 4 5 6 7 8 9 10111213 nc +v nc output nc nc = no connect nc nc nc ?v nc c comp nc offset null offset null nc ?in nc +in nc nc ad829 top view (not to scale) figure 2. 20-terminal lcc operating as a traditional voltage feedback amplifier, the ad829 provides many of the advantages that a transimpedance amplifier offer. a bandwidth >50 mhz can be maintained for a range of gains through the replacement of the external compensation capacitor. the ad829 and the transimpedance amplifier are both unity-gain stable and provide similar voltage noise performance (1.7 nv/hz); however, the current noise of the ad829 (1.5 pa/hz) is less than 10% of the noise of transimpedance amplifiers. the inputs of the ad829 are symmetrical. product highlights 1. the input voltage noise of 2 nv/hz, current noise of 1.5 pa/hz, and 50 mhz bandwidth for gains of 1 to 20 make the ad829 an ideal preamp. 2. a differential phase error of 0.04 and a 0.02% differential gain error, at the 3.58 mhz ntsc, 4.43 mhz pal, and secam color subcarrier frequencies, make the op amp an outstanding video performer for driving reverse-terminated 50 and 75 cables to 1 v (at their terminated end). 3. the ad829 can drive heavy capacitive loads. 4. performance is fully specified for operation from 5 v to 15 v supplies. 5. the ad829 is available in pdip, cerdip, and small outline packages. chips and mil-std-883b parts are also available. the 8-lead soic is available for the extended temperature range (?40c to +125c).
ad829 rev. h | page 2 of 20 table of contents features .............................................................................................. 1 ? general description ......................................................................... 1 ? connection diagram ....................................................................... 1 ? product highlights ........................................................................... 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? absolute maximum ratings ............................................................ 5 ? thermal characteristics .............................................................. 5 ? metallization photo ...................................................................... 5 ? esd caution .................................................................................. 5 ? typical performance characteristics ............................................. 6 ? test circuits ..................................................................................... 11 ? theory of operation ...................................................................... 12 ? externally compensating the ad829 ...................................... 12 ? shunt compensation ................................................................. 12 ? current feedback compensation ............................................ 13 ? low error video line driver ................................................... 15 ? high gain video bandwidth, 3-op-amp instrumentation amplifier ..................................................................................... 16 ? outline dimensions ....................................................................... 17 ? ordering guide .......................................................................... 19 ? revision history 4/09rev. g to rev. h changes to features .......................................................................... 1 changes to quiescent current parameter, table 1 ...................... 4 changes to table 2 ............................................................................ 5 added thermal characteristics section and table 3 .................. 5 updated outline dimensions ....................................................... 17 changes to ordering guide .......................................................... 19 4/04rev. f to rev. g added figure 1; renumbered sequentially .................................. 4 changes to ordering guide ............................................................ 5 updated table i ............................................................................... 11 updated figure 15 .......................................................................... 12 updated figure 16 .......................................................................... 13 updated outline dimensions ....................................................... 14 2/03rev. e to rev. f renumbered figures ......................................................... universal changes to product highlights ....................................................... 1 changes to specifications ................................................................. 2 changes to absolute maximum ratings ........................................ 4 changes to ordering guide ............................................................. 4 updated outline dimensions ....................................................... 13
ad829 rev. h | page 3 of 20 specifications t a = 25c and v s = 15 v dc, unless otherwise noted. table 1. ad829jr ad829ar ad829aq/ad829s parameter conditions v s min typ max min typ max min typ max unit input offset voltage t min to t max 5 v, 15 v 0.2 1 0.2 1 0.1 0.5 mv 1 1 0.5 mv offset voltage drift 5 v, 15 v 0.3 0.3 0.3 v/c input bias current 5 v, 15 v 3.3 7 3.3 7 3.3 7 a t min to t max 8.2 9.5 9.5 a input offset current 5 v, 15 v 50 500 50 500 50 500 na t min to t max 500 500 500 na offset current drift 5 v, 15 v 0.5 0.5 0.5 na/c open-loop gain v o = 2.5 v, r l = 500 5 v 30 65 30 65 30 65 v/mv r l = 150 40 40 40 v/mv t min to t max 20 20 20 v/mv v o = 10 v, r l = 1 k 15 v 50 100 50 100 50 100 v/mv r l = 500 85 85 85 v/mv t min to t max 20 20 20 v/mv dynamic performance gain bandwidth product 5 v 600 600 600 mhz 15 v 750 750 750 mhz full power bandwidth 1 , 2 v o = 2 v p-p, r l = 500 5 v 25 25 25 mhz v o = 20 v p-p, r l = 1 k 15 v 3.6 3.6 3.6 mhz slew rate 2 r l = 500 5 v 150 150 150 v/s r l = 1 k 15 v 230 230 230 v/s settling time to 0.1% a v = C19 ?2.5 v to +2.5 v 5 v 65 65 65 ns 10 v step 15 v 90 90 90 ns phase margin 2 c l = 10 pf 15 v r l = 1 k 60 60 60 degrees differential gain error 3 r l = 100 , c comp = 30 pf 15 v 0.02 0.02 0.02 % differential phase error 3 r l = 100 , c comp = 30 pf 15 v 0.04 0.04 0.04 degrees common-mode rejection v cm = 2.5 v 5 v 100 120 100 120 100 120 db v cm = 12 v 15 v 100 120 100 120 100 120 db t min to t max 96 96 96 db power supply rejection v s = 4.5 v to 18 v 98 120 98 120 98 120 db t min to t max 94 94 94 db input voltage noise f = 1 khz 15 v 1.7 2 1.7 2 1.7 2 nv/hz input current noise f = 1 khz 15 v 1.5 1.5 1.5 pa/hz
ad829 rev. h | page 4 of 20 ad829jr ad829ar ad829aq/ad829s parameter conditions v s min typ max min typ max min typ max unit input common-mode voltage range 5 v +4.3 +4.3 +4.3 v ?3.8 ?3.8 ?3.8 v 15 v +14.3 +14.3 +14.3 v ?13.8 ?13.8 ?13.8 v output voltage swing r l = 500 5 v 3.0 3.6 3.0 3.6 3.0 3.6 v r l = 150 5 v 2.5 3.0 2.5 3.0 2.5 3.0 v r l = 50 5 v 1.4 1.4 1.4 v r l = 1 k 15 v 12 13.3 12 13.3 12 13.3 v r l = 500 15 v 10 12.2 10 12.2 10 12.2 v short-circuit current 5 v, 15 v 32 32 32 ma input characteristics input resistance (differential) 13 13 13 k input capacitance (differential) 4 5 5 5 pf input capacitance (common mode) 1.5 1.5 1.5 pf closed-loop output resistance a v = +1, f = 1 khz 2 2 2 m power supply operating range 4.5 18 4.5 18 4.5 18 v quiescent current 5 v 5 6.5 5 6.5 5 6.5 ma t min to t max 8.0 8.0 8.7 ma 15 v 5.3 6.8 5.3 6.8 5.3 6.8 ma t min to t max 8.3 9.0 9.0 ma transistor count number of transistors 46 46 46 1 full power bandwidth = slew rate/2 v peak . 2 tested at gain = 20, c comp = 0 pf. 3 3.58 mhz (ntsc) and 4.43 mhz (pal and secam). 4 differential input capacitance consists of 1.5 pf package capacitance plus 3.5 pf from the input differential pair.
ad829 rev. h | page 5 of 20 absolute maximum ratings table 2. parameter rating supply voltage 18 v internal power dissipation 1 8-lead pdip (n) 1.3 w 8-lead soic (r) 0.9 w 8-lead cerdip (q) 1.3 w 20-terminal lcc (e) 0.8 w differential input voltage 2 6 v output short-circuit duration indefinite storage temperature range 8-lead cerdip (q) and 20-terminal lcc (e) ?65c to +150c 8-lead pdip (n) and 8-lead soic (r) ?65c to +125c operating temperature range ad829j 0c to 70c ad829a ?40c to +125c ad829s ?55c to +125c lead temperature (soldering, 60 sec) 300c 1 maximum internal power dissipation is specified so that t j does not exceed 150c at an ambient temperature of 25c. 2 if the differential voltage exceeds 6 v, external series protection resistors should be adde d to limit the input current. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal characteristics table 3. package type ja unit 8-lead pdip (n) 100 (derates at 8.7 mw/c) c/w 8-lead cerdip (q) 110 (derates at 8.7 mw/c) c/w 20-lead lcc (e) 77 c/w 8-lead soic (r) 125 (derates at 6 mw/c) c/w metallization photo 00880-003 ?in 2 offset null 1 0.054 (1.37) 0.067 (1.70) substrate connected to +v s offset null 8 +v s 7 ?v s 4 c comp 5 output 6 +in 3 figure 3. metallization photo; contact factory for latest dimensions, dimensions shown in inches and (millimeters) 00880-004 ambient temperature ( c) maximum power dissipation (w) ?55 ?45 ?35 ?25 ?15 ?5 5 15 25 35 45 55 65 75 85 95 105 115 0 0.5 1.0 1.5 2.0 2.5 125 cerdip soic pdip lcc figure 4. maximum power dissipation vs. temperature esd caution
ad829 rev. h | page 6 of 20 typical performance characteristics 00880-005 supply voltage ( v) input common-mode range (v) 0 5 10 15 0 5 10 15 20 20 +v out ?v out figure 5. input common-mode range vs. supply voltage 00880-006 supply voltage (v) magnitude of the output voltage (v) 0 5 10 15 0 5 10 15 20 20 +v out ?v out r l = 1k ? figure 6. output voltage swing vs. supply voltage 00880-007 load resistance ( ) output voltage swing (v p-p) 10 100 1k 0 5 10 25 20 15 30 10k 15v supplies 5v supplies figure 7. output voltage swing vs. resistive load 00880-008 supply voltage ( v) quiescent current (ma) 0 5 10 15 4.0 4.5 5.0 5.5 6.0 20 figure 8. quiescent current vs. supply voltage 00880-009 temperature ( c) input bias current ( a) ?60 ?40 ?20 0 20 40 60 80 100 120 ?2 ?3 ?4 ?5 140 v s = 5v, 15v figure 9. input bias current vs. temperature 00880-010 frequency (hz) closed-loop output impedance ( ) 1k 10k 100k 1m 10m 0.001 0.01 0.1 1 10 100 100m a v = 20 c comp = 0pf a v = 1 c comp = 68pf figure 10. closed-loop outp ut impedance vs. frequency
ad829 rev. h | page 7 of 20 00880-011 temperature ( c) quiescent current (ma) ?60 ?40 ?20 0 20 40 60 80 100 120 3 7 6 5 4 140 v s = 15v v s = 5v figure 11. quiescent current vs. temperature 00880-012 ambient temperature (c) short-circuit current limit (ma) ?60 ?40 ?20 0 20 40 60 80 100 120 15 40 30 35 25 20 140 negative current limit positive current limit v s = 5v figure 12. short-circuit current limit vs. ambient temperature 00880-013 temperature (c) ?3db bandwidth (mhz) ?60 ?40 ?20 0 20 40 60 80 100 120 45 65 60 55 50 140 v s = 15v a v = +20 c comp = 0pf figure 13. C3 db bandwidth vs. temperature 00880-014 frequency (hz) open-loop gain (db) phase (degrees) 100 1k 10k 100k 1m 10m 0 120 100 80 60 40 20 ?20 100 80 60 40 20 0 100m phase gain 5v supplies 500 load gain 15v supplies 1k load c comp = 0pf figure 14. open-loop gain and phase vs. frequency 00880-015 load resistance ( ) open-loop gain (db) 10 100 1k 75 80 85 90 95 100 105 10k v s = 15v v s = 5v figure 15. open-loop gain vs. resistive load 00880-016 frequency (hz) psrr (db) 1k 10k 100k 1m 10m 20 120 100 60 80 40 100m +supply ?supply c comp = 0pf figure 16. power supply rejectio n ratio (psrr) vs. frequency
ad829 rev. h | page 8 of 20 00880-017 frequency (hz) cmrr (db) 1k 10k 100k 1m 10m 20 120 100 60 80 40 100m c comp = 0pf figure 17. common-mode rejection ratio (cmrr) vs. frequency 00880-018 input frequency (mhz) output voltage (v p-p) 11 0 0 5 10 15 20 25 30 100 v s = 15v r l = 1k ? a v = +20 c comp = 0pf v s = 5v r l = 500 ? a v = +20 c comp = 0pf figure 18. large signal frequency response 00880-019 settling time (ns) output swing from 0 to v 0 20 40 60 80 100 120 140 ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 10 160 1% 1% 0.1% 0.1% error a v = ?19 c comp = 0pf figure 19. output swing and error vs. settling time 00880-020 frequency (hz) thd (db) 100 300 1k 3k 10k 30k ?110 ?105 ?100 ?95 ?90 ?85 ?80 ?75 ? 70 100k v in = 3v rms a v = ?1 c comp = 30pf c l = 100pf r l = 500 ? r l = 2k ? figure 20. total harmonic distortion (thd) vs. frequency 00880-021 frequency (hz) thd (db) 0 500k 1.0m 1.5m ?70 ? 20 ?30 ?40 ?50 ?60 2.0m third harmonic second harmonic v in = 2.25v rms a v = ?1 r l = 250 ? c l = 0pf c comp = 30pf figure 21. second and third thd vs. frequency 00880-022 frequency (hz) input voltage noise (nv/ hz) 10 100 1k 10k 100k 1m 0 5 4 3 2 1 10m figure 22. input voltage noise spectral density
ad829 rev. h | page 9 of 20 00880-023 ?60 ?40 ?20 0 20 40 60 80 100 120 100 400 350 300 250 200 150 140 rise fall rise fall v s = 15v v s = 5v a v = +20 slew rate 10% to 90% slew rate (v/s) temperature (c) figure 23. slew rate vs. temperature 00880-024 supply voltage (v) differential phase (degrees) differential gain (%) 5 10 0.03 0.05 0.04 0.03 0.02 0.01 15 0.043 differential gain differential phase figure 24. differential phase and gain vs. supply voltage 00880-027 200mv 50ns 0% 10 90 figure 25. gain-to-2 follower large signal pulse response (see figure 32 ) 00880-028 20mv 20ns 0% 10 90 100% figure 26. gain-of-2 follower small signal pulse response (see figure 32 ) 00880-030 2v 50ns 0% 10 90 100% figure 27. gain-of-20 follower large signal pulse response (see figure 33 ) 00880-031 50mv 20ns 0% 10 90 100% figure 28. gain-of-20 follower small signal pulse response (see figure 33 )
ad829 rev. h | page 10 of 20 00880-033 200mv 50ns 0% 10 90 100% figure 29. unity-gain inverter large signal pulse response (see figure 34 ) 00880-034 20mv 20ns 0% 10 90 100% figure 30. unity-gain inverter small signal pulse response (see figure 34 )
ad829 rev. h | page 11 of 20 test circuits 00880-025 1 2 3 8 5 7 4 6 ? + ad829 ?v s +v s offset null adjust 20k 0.1 f 0.1 f c comp (external) figure 31. offset null and external shunt compensation connections 00880-026 3 2 7 5 6 4 + ? ad829 +15 v ?15v 0.1f 5pf 300k? 300k? c comp 15pf 0.1f 50? cable 50 ? 50? 50? tektronix type 7a24 preamp 50? cable hp8130a 5ns rise time figure 32. follower connection, gain = 2 00880-029 2 3 7 6 4 ? + ad829 +15 v ?15v 0.1f 1pf 2k? 105k ? 0.1f 5 ? 100 ? 50? cable hp8130a 5ns rise time tektronix type 7a24 preamp fet probe 45? c comp = 0pf figure 33. follower connection, gain = 20 00880-032 2 3 7 6 4 ? + ad829 +15v ?15v 0.1f 0.1f 5 c comp 15pf 50 ? hp8130a 5ns rise time 50? cable 50? cable 300 ? 50? 5p f 300? 50 ? tektronix type 7a24 preamp figure 34. unity-gain inverter connection
ad829 rev. h | page 12 of 20 theory of operation the ad829 is fabricated on the analog devices, inc., proprietary complementary bipolar (cb) process, which provides pnp and npn transistors with similar f t s of 600 mhz. as shown in figure 35 , the ad829 input stage consists of an npn differential pair in which each transistor operates at a 600 a collector current. this gives the input devices a high transconductance, which in turn gives the ad829 a low noise figure of 2 nv/hz at 1 khz. for gains between 1 and 20, choose c comp to keep the small signal bandwidth relatively constant. the minimum gain that will still provide stability depends on the value of the external compensation capacitance. an rc network in the output stage (see figure 35 ) completely removes the effect of capacitive loading when the amplifier compensates for closed-loop gains of 10 or higher. at low frequencies, and with low capacitive loads, the gain from the compensation node to the output is very close to unity. in this case, c is bootstrapped and does not contribute to the compensation capacitance of the device. as the capacitive load increases, a pole forms with the output impedance of the output stage, which reduces the gain, and subsequently, c is incompletely bootstrapped. therefore, some fraction of c contributes to the compensation capacitance, and the unity-gain bandwidth falls. as the load capacitance is further increased, the bandwidth continues to fall, and the amplifier remains stable. 00880-035 ?in +in 1.2ma offset null c 12.5pf r 500 output +v s ?v s c comp 15 15 externally compen sating the ad829 the ad829 is stable with no external compensation for noise gains greater than 20. for lower gains, two different methods of frequency compensating the amplifier can be used to achieve closed-loop stability: shunt and current feedback compensation. figure 35. simplified schematic shunt compensation the input stage drives a folded cascode that consists of a fast pair of pnp transistors. these pnps drive a current mirror that provides a differential-input-to-single-ended-output conversion. the high speed pnps are also used in the current-amplifying output stage, which provides a high current gain of 40,000. even under heavy loading conditions, the high f t s of the npn and pnps, produced using the cb process, permit cascading two stages of emitter followers while maintaining 60 phase margin at closed-loop bandwidths greater than 50 mhz. figure 36 and figure 37 show that shunt compensation has an external compensation capacitor, c comp , connected between the compensation pin and ground. this external capacitor is tied in parallel with approximately 3 pf of internal capacitance at the compensation node. in addition, a small capacitance, c lead , in parallel with resistor r2, compensates for the capacitance at the inverting input of the amplifier. 00880-036 2 3 7 6 4 ? + ad829 +v s ?v s 0.1 f 0.1 f 5 c comp 50 50 coax cable r1 c lead r2 v out 1k v in two stages of complementary emitter followers also effectively buffer the high impedance compensation node (at the c comp pin) from the output so that the ad829 can maintain a high dc open- loop gain, even into low load impedances (92 db into a 150 load and 100 db into a 1 k load). laser trimming and ptat biasing ensure low offset voltage and low offset voltage drift, enabling the user to eliminate ac coupling in many applications. for added flexibility, the ad829 provides access to the internal frequency compensation node. this allows users to customize the frequency response characteristics for a particular application. figure 36. inverting amplifier connection using external shunt compensation unity-gain stability requires a compensation capacitance of 68 pf (pin 5 to ground), which yields a small signal bandwidth of 66 mhz and slew rate of 16 v/s. the slew rate and gain bandwidth product varies inversely with compensation capacitance. table 4 and figure 37 show the optimum compensation capacitance and the resulting slew rate for a desired noise gain.
ad829 rev. h | page 13 of 20 00880-037 3 2 7 6 4 + ? ad829 +v s ?v s 0.1 f 0.1 f c lead 5 c comp 50 50 cable v out r2 r1 1k v in figure 37. noninverting amplifie r connection using external shunt compensation table 4 gives the recommended c comp and c lead values, as well as the corresponding slew rates and bandwidth. the capacitor values were selected to provide a small signal frequency response with <1 db of peaking and <10% overshoot. for tabl e 4 , 15 v supply voltages should be used. figure 38 is a graphical extension of table 4 , which shows the slew rate/gain trade-off for lower closed- loop gains, when using the shunt compensation scheme. 00880-038 noise gain c comp (pf) slew rate (v/ s) 11 0 1 10 100 10 100 1k 100 slew rate c comp v s = 15v figure 38. value of c comp and slew rate vs. noise gain current feedback compensation bipolar, nondegenerated, single-pole, and internally compensated amplifiers have their bandwidths defined as comp comp e t c q kt i cr f = = 2 2 1 where: f t is the unity-gain bandwidth of the amplifier. i is the collector current of the input transistor. c comp is the compensation capacitance. r e is the inverse of the transconductance of the input transistors. kt/q approximately equals 26 mv at 27c. because both f t and slew rate are functions of the same variables, the dynamic behavior of an amplifier is limited. because comp c i rateslew 2 = then q kt f rateslew t = 4 this shows that the slew rate is only 0.314 v/s for every mega- hertz of bandwidth. the only way to increase the slew rate is to increase the f t , and that is difficult because of process limitations. unfortunately, an amplifier with a bandwidth of 10 mhz can only slew at 3.1 v/s, which is barely enough to provide a full power bandwidth of 50 khz. the ad829 is especially suited to a form of current feedback compensation that allows for the enhancement of both the full power bandwidth and the slew rate of the amplifier. the voltage gain from the inverting input pin to the compensation pin is large; therefore, if a capacitance is inserted between these pins, the bandwidth of the amplifier becomes a function of its feed- back resistor and the capacitance. the slew rate of the amplifier is now a function of its internal bias (2i) and the compensation capacitance. table 4. component selection for shunt compensation follower gain inverter gain r1 () r2 () c lead (pf) c comp (pf) slew rate (v/s) ? 3 db small signal bandwidth (mhz) 1 open 100 0 68 16 66 2 ?1 1 k 1 k 5 25 38 71 5 ?4 511 2.0 k 1 7 90 76 10 ?9 226 2.05 k 0 3 130 65 20 ?19 105 2 k 0 0 230 55 25 ?24 105 2.49 0 0 230 39 100 ?99 20 2 k 0 0 230 7.5
ad829 rev. h | page 14 of 20 because the closed-loop bandwidth is a function of r f and c comp (see figure 39 ), it is independent of the amplifier closed- loop gain, as shown in figure 41 . to preserve stability, the time constant of r f and c comp needs to provide a bandwidth of <65 mhz. for example, with c comp = 15 pf and r f = 1 k, the small signal bandwidth of the ad829 is 10 mhz. figure 40 shows that the slew rate is in excess of 60 v/s. as shown in figure 41 , the closed-loop bandwidth is constant for gains of ?1 to ?4; this is a property of the current feedback amplifiers. 00880-039 2 3 7 6 4 ? + ad829 +v s ?v s 0.1 f 5 0.1 f c1* 50 50 coax cable r1 c comp r f v out r l 1k v in in4148 *recommended value of c comp for c1 <7pf 0pf 7pf 15pf c comp should never exceed 15pf for this connection figure 39. inverting amplifier connection using current feedback compensation 00880-040 5v 200ns 0% 10 90 100% figure 40. large signal pulse response of inverting amplifier using current feedback compensation, c comp = 15 pf, c1 = 15 pf r f = 1 k, r1 = 1 k 00880-041 frequency (hz) closed-loop gain (db) 100k 1m 10m ?15 ?12 ?9 ?6 ?3 0 3 6 9 12 15 100m gain = ?4 ?3db @ 8.2mhz gain = ?2 ?3db @ 9.6mhz gain = ?1 ?3db @ 10.2mhz v in = ?30dbm v s = 15v r l = 1k r f = 1k c comp = 15pf c1 = 15pf figure 41. closed-loop gain vs. frequency for the circuit of figure 38 figure 42 is an oscilloscope photo of the pulse response of a unity- gain inverter that has been conf igured to provide a small signal bandwidth of 53 mhz and a subsequent slew rate of 180 v/s; r f = 3 k and c comp = 1 pf. figure 43 shows the excellent pulse response as a unity-gain inverter, this using component values of r f = 1 k and c comp = 4 pf. 00880-042 5v 200ns 0% 10 90 100% figure 42. large signal pulse response of the inverting amplifier using current feedback compensation, c comp = 1 pf, r f = 3 k, r1 = 3 k 00880-043 20mv 10ns 0% 10 90 100% figure 43. small signal pulse response of inverting amplified using current feedback compensation, c comp = 4 pf, r f = 1 k, r1 = 1 k
ad829 rev. h | page 15 of 20 figure 44 and figure 45 show the closed-loop frequency response of the ad829 for different closed-loop gains and different supply voltages. 00880-044 frequency (mhz) closed-loop gain (db) 11 0 ?15 ?12 ?9 ?6 ?3 0 3 6 9 12 15 100 gain = ?4 c comp = 2pf gain = ?2 c comp = 3pf gain = ?1 c comp = 4pf v s = 15v r l = 1k r f = 1k v in = ?30dbm figure 44. closed-loop frequency response for the inverting amplifier using current feedback compensation 00880-045 frequency (mhz) output level (db) 11 0 ?47 ?44 ?41 ?38 ?35 ?32 ?29 ?26 ?23 ?20 ?17 100 5v 15v v in = ?20dbm r l = 1k r f = 1k gain = ?1 c comp = 4pf figure 45. closed-loop frequency response vs. supply for the inverting amplifier using current feedback compensation when a noninverting amplifier configuration using a current feedback compensation is needed, the circuit shown in figure 46 is recommended. this circuit provides a slew rate twice that of the shunt compensated noninverting amplifier of figure 47 at the expense of gain flatness. nonetheless, this circuit delivers 95 mhz bandwidth with 1 db flatness into a back-terminated cable, with a differential gain error of only 0.01% and a differential phase error of only 0.015 at 4.43 mhz. 00880-046 3 2 7 6 4 5 + ? ad829 +15v ?15v 0.1 f 3pf c comp 2k 2k 0.1 f 50 50k 50 50 coax cable 50 coax cable v in v out figure 46. noninverting amplifier connection using current feedback compensation 00880-047 3 2 7 6 5 4 + ? ad829 +15v 0.1 f 30pf c comp ?15v 0.1 f 300 300 75 75 75 50 coax cable v in v out optional 2pf to 7pf flatness trim figure 47. video line driver with a flatness over frequency adjustment low error video line driver the buffer circuit shown in figure 47 drives a back-terminated 75 video line to standard video levels (1 v p-p), with 0.1 db gain flatness to 30 mhz and with only 0.04 and 0.02% differential phase and gain at the 4.43 mhz pal color subcarrier frequency. this level of performance, which meets the requirements for high definition video displays and test equipment, is achieved using only 5 ma quiescent current.
ad829 rev. h | page 16 of 20 high gain video bandwidth, 3-op-amp instrumentation amplifier the input amplifiers operate at a gain of 20, while the output op amp runs at a gain of 5. in this circuit, the main bandwidth limitation is the gain/bandwidth product of the output amplifier. extra care should be taken while breadboarding this circuit because even a couple of extra picofarads of stray capacitance at the compensation pins of a1 and a2 will degrade circuit bandwidth. figure 48 shows a 3-op-amp instrumentation amplifier circuit that provides a gain of 100 at video bandwidths. at a circuit gain of 100, the small signal bandwidth equals 18 mhz into a fet probe. small signal bandwidth equals 6.6 mhz with a 50 load. the 0.1% settling time is 300 ns. 00880-048 +15v ?15v comm 10f 10f 0.1f 0.1f 1f 1f 0.1f 0.1f +v s ?v s pin 4 each amplifier pin 7 100hz 1mhz 10mhz 64.6db 44.7db 23.9db input frequency cmrr a1 ad829 2pf to 8pf settling time ac cmr adjust 3pf 3pf 1pf 1pf 2k? 200? r g 210? 1k ? 2k? 200? 970? 50? 2k? (g = 5) 5 3 2 6 dc cmr adjust 3pf (g = 20) (g = 20) a2 ad829 a3 ad848 +v in +v in circuit gain = + 1 4000 ? r g 5 5 2 3 6 5 3 2 6 figure 48. high gain video band width, 3-op-amp in-amp circuit
ad829 rev. h | page 17 of 20 outline dimensions controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-a a 012407-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 49. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and (inches) compliant to jedec standards ms-001 controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. corner leads may be configured as whole or half leads. 070606-a 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) seating plane 0.015 (0.38) min 0.210 (5.33) max 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 8 1 4 5 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.100 (2.54) bsc 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 0.060 (1.52) max 0.430 (10.92) max 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) gauge plane 0.005 (0.13) min figure 50. 8-lead plastic dual in-line package [pdip] narrow body (n-8) dimensions shown in inches and (millimeters)
ad829 rev. h | page 18 of 20 controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. 0.310 (7.87) 0.220 (5.59) 0.005 (0.13) min 0.055 (1.40) max 0.100 (2.54) bsc 15 0 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) seating plane 0.200 (5.08) max 0.405 (10.29) max 0.150 (3.81) min 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.070 (1.78) 0.030 (0.76) 0.060 (1.52) 0.015 (0.38) 14 5 8 figure 51. 8-lead ceramic dual in-line [cerdip] (q-8) dimensions shown in inches and (millimeters) controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. 1 20 4 9 8 13 19 14 3 18 bottom view 0.028 (0.71) 0.022 (0.56) 45 typ 0.015 (0.38) min 0.055 (1.40) 0.045 (1.14) 0.050 (1.27) bsc 0.075 (1.91) ref 0.011 (0.28) 0.007 (0.18) r typ 0.095 (2.41) 0.075 (1.90) 0.100 (2.54) ref 0.200 (5.08) ref 0.150 (3.81) bsc 0.075 (1.91) ref 0.358 (9.09) 0.342 (8.69) sq 0.358 (9.09) max sq 0.100 (2.54) 0.064 (1.63) 0.088 (2.24) 0.054 (1.37) 022106-a figure 52. 20-terminal cerami c leadless chip carrier [lcc] (e-20-1) dimensions shown in inches and (millimeters)
ad829 rev. h | page 19 of 20 ordering guide model temperature range package description package option ad829ar ?40c to +125c 8-lead soic_n r-8 ad829ar-reel ?40c to +125c 8-lead soic_n r-8 ad829ar-reel7 ?40c to +125c 8-lead soic_n r-8 ad829arz 1 ?40c to +125c 8-lead soic_n r-8 AD829ARZ-REEL 1 ?40c to +125c 8-lead soic_n r-8 AD829ARZ-REEL7 1 ?40c to +125c 8-lead soic_n r-8 ad829jn 0c to 70c 8-lead pdip n-8 ad829jnz 1 0c to 70c 8-lead pdip n-8 ad829jr 0c to 70c 8-lead soic_n r-8 ad829jr-reel 0c to 70c 8-lead soic_n r-8 ad829jr-reel7 0c to 70c 8-lead soic_n r-8 ad829jrz 1 0c to 70c 8-lead soic_n r-8 ad829jrz-reel 1 0c to 70c 8-lead soic_n r-8 ad829jrz-reel7 1 0c to 70c 8-lead soic_n r-8 ad829aq ?40c to +125c 8-lead cerdip q-8 ad829sq ?55c to +125c 8-lead cerdip q-8 ad829sq/883b ?55c to +125c 8-lead cerdip q-8 5962-9312901mpa ?55c to +125c 8-lead cerdip q-8 ad829se/883b ?55c to +125c 20-lead lcc e-20-1 5962-9312901m2a ?55c to +125c 20-lead lcc e-20-1 ad829jchips die ad829schips die 1 z = rohs compliant part.
ad829 rev. h | page 20 of 20 notes ?2009 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d00880-0-4/09(h)

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